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Distinguished Seminar Speaker | Gaurang Choksi, Intel Corporation Title: "Heterogeneous Electronic Packaging: Enabling the Creation, Computing, Communication and Management of Data" Speaker: Gaurang Choksi Abstract: Technology advances in electronic packaging have supported and sustained silicon scaling and has evolved to become an important enabler of product performance. Market segments in the areas computing, memory, communications and networking and ranging from consumer electronics to high performance cloud computing / servers and emerging areas such as autonomous driving, smart & connected devices and machine learning will drive the need for increased integration and differentiation. This results in an extremely diverse set of 2D, 2.5, 3D packaging architectures and designs with multiple levels of integration, requiring novel architectures, material technologies and manufacturing processes. The rapid rate of progress in the area of heterogeneous packaging and assembly / test will continue to require significant improvements in the collaterals required to enable time-sensitive, cost-effective, and ‘smart’ technologies. This includes appropriate modeling/simulation software tools and measurement tools /techniques for the analysis, characterization, validation and optimization of the different steps of the design, assembly manufacturing and test process, materials used to meet mechanical integrity, signal integrity, power delivery and thermal requirements. Challenges that need to be addressed for facilitating the effective analysis and characterization to enable efficient design, materials selection and associated assembly and test manufacturing processes will be reviewed. The role of inter-disciplinary solutions and the need for new competencies will be discussed. Biography: Dr. Gaurang Choksi joined Intel in 1988, after receiving his PhD degree from Virginia Tech. During his 30+ year tenure at Intel, he has contributed to various areas including structural analysis and testing, electrical and physical design and analysis of multi-chip modules, design/analysis tool development for packages/boards, and thermal technologies and solutions. The scope of his group includes materials selection and characterization, dimensional measurements, and modeling and validation related to structural integrity, power delivery, high speed signaling, thermals and heat dissipation, and fluid flow to support the design and development of electronic packaging, assembly and test technologies. The group has teams and labs in Arizona, Oregon and Malaysia. He is a recipient of the Intel Achievement Award and serves on academic and national advisory / review boards. This Event is For: Graduate • Undergraduate • Faculty • Staff • Post-Docs
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